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Our team of talented engineers is dedicated to enabling customers to design and verify leading-edge ASICs and SoCs that are bug-free and taped out on time.
Founder
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Lead Consultant
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Lead Engineer
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ABOUT US
About Us
About Pure Silicon Solutions
Pure Silicon partners with semiconductor and systems companies to reduce design and verification risk in increasingly complex SoC programs. As device architectures scale in capability and integration, traditional verification approaches struggle to keep pace, creating coverage blind spots, regression inefficiencies, and late-stage uncertainty.
Since 2022, Pure Silicon has worked alongside engineering leaders to close high-risk verification gaps with a disciplined combination of advanced simulation and targeted formal methods. Our team operates at the architectural level, contributing structural insight and risk prioritization.
Pure Silicon’s expert team integrates seamlessly into existing verification efforts, aligning with established workflows, toolchains, and delivery milestones. By applying the right technique to the right risk area, we expose deep corner-case and system level issues early, improving convergence, strengthening coverage integrity, and increasing confidence at tape-out.
An ISO9001 : 2015, and ISO27001 certified organization, Pure Silicon delivers defensible, audit-ready verification results suited for safety-critical and high-reliability markets. Our focus is measurable impact: reduced late-stage surprises, stronger coverage closure, and more resilient silicon programs.
10+
Active and Engaged Clients
Customer Centricity
Consistency & Trustworthy
Transparency
Passion for Problem Solving
Teamwork
Meet Our Expert Team
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Great Team
See Our Skilled Expert
Team
Meet Our Expert Team
_edited.jpg)
Our Vision
To make disciplined, risk-driven verification the standard for complex SoC development so that high-impact silicon reaches the world with confidence.
Our Mission
Empowering Innovation Through Silicon Engineering Excellence:
To partner with semiconductor and systems companies to strengthen verification strategy, close critical coverage gaps, and improve confidence at tape-out. Through architecture-level analysis and a pragmatic blend of simulation and formal methods, we help engineering teams focus effort where risk is greatest accelerating convergence and enabling first-pass success in high-stakes silicon programs.
Company Values
We integrate as an extension of our customers engineering teams, aligning with their workflows, constraints, and program goals.Shared ownership drives shared success.
We communicate transparently, take responsibility for outcomes, and hold ourselves to the highest professional and quality standards.
Quality is built through disciplined methodology, deep technical understanding, and precise execution. We approach verification as a structured engineering challenge, and not a volume exercise.
We evaluate systems at their structural and behavioral boundaries, identifying risk patterns that surface beyond block-level testing. Insight at the architectural level enables more meaningful coverage closure.
We apply the right tools and techniques to the right problems. Our objective is measurable risk reduction, not theoretical completeness.
We invest in ongoing learning, mentorship, and
methodological improvement to remain effective in an evolving silicon landscape.
Great Team
See our Skilled and Seasoned
Team
Our team of talented engineers is dedicated to enabling customers to design and verify leading-edge ASICs and SoCs that are bug-free and taped out on time.
Ramesh Kodnani
Founder and CEO
Ramesh is the Founder and Chief Executive Officer of Pure Silicon Solutions. He is a seasoned business leader with over 20 years of experience leading high-performance teams in technology companies.
With a relentless focus on customer success, Ramesh enjoys solving complex engineering problems by building and leading world-class teams. Before PSS, Ramesh was the US country manager for multiple large European public companies, and he has held several executive sales and business development leadership roles at large corporations like IBM as well as technology startups like Oski Technology (now part of NVIDIA) and Cycuity.
Ramesh thrives on win-win negotiations, focusing on customer needs, meticulous planning, flawless execution by cross-functional and expert teams, and regular open communication. He holds an MS in Engineering and an MBA in Marketing and Finance from Lehigh University and a Sales Executive Certification from Harvard University.
Goran Petrovity
Chief Technology Officer
Goran is the Chief Technology Officer at Pure Silicon Solutions. He has hands-on experience solving complex digital design and verification challenges over the past 20 years, working with market leaders like ARM, ST-Ericsson, and Cadence.
His expertise and technical leadership in static and dynamic verification and digital design has propelled many projects and products to successfully tape out in multiple application domains, including IoT, mobile, automotive, and radio. At Jasper and Cadence, Goran was instrumental in evangelizing and implementing formal verification methods and tools at several large European customers.
Goran is a passionate teacher and avid angler. He holds an MS in Electrical Engineering from the Budapest University of Technology and Economics.
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Sasa Stamenkovic
Principal Engineer and a Formal Verification Leader
Sasa is a Principal Engineer and a Formal Verification Leader at Pure Silicon Solutions. With 15 years of experience verifying complex hardware designs, he has developed a keen eye for detail and a deep understanding of formal methods. For Sasa, formal verification is not just a career but a passion, driving him to learn and adopt new methodologies continuously.
Sasa’s journey has been fueled by a desire to ensure the highest level of accuracy and reliability in hardware systems. Throughout his career at 1-spin and Siemens, Sasa has worked on cutting-edge projects and collaborated with talented professionals, contributing to the advancement of formal verification practices. He thrives in environments where challenges are met with innovative solutions and a commitment to excellence.
As an active and avid learner, Sasa is eager to expand his knowledge and stay ahead of industry trends. He holds an MS in VLSI Engineering from the University of Novom Sadu in Serbia.
Antonio Bruto da Costa
Lead Formal Verification Engineer
As a Lead Formal Verification Engineer at Pure Silicon Solutions, António brings over 15 years of blended industry and academic experience in verifying complex systems. His expertise covers formal verification, language design, and causal learning models, emphasizing safety-critical applications.
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His career started in formal methods research at the Indian Institute of Technology Kharagpur, where he also earned his M.Tech and PhD. There, he developed languages and tools to verify hybrid systems, including Analog and Mixed-Signal designs. Later, at the University of Warwick’s Safe Autonomy Research Group, his work centered on the validation of Connected and Autonomous Vehicles (CAVs). He developed domain-specific languages for scenarios, formalized Rules of the Road, and contributed to standards for Automated Driving Systems.
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António has also advised on languages for quantitative safety assessment and previously worked as a Software Engineer. He holds a B.Eng. from Goa Engineering College and is a passionate teacher, dancer, and musician.
Peter Simon
Head of Dynamic Verification
Peter is the Head of Dynamic Verification at Pure Silicon Solutions. As a verification leader with over 15 years of ASIC verification experience, he has driven complex SoC projects in GPU and IoT markets and contributed to mobile and AI accelerator segments.
Peter is a relentless and efficient problem solver, and has worked in diverse set of companies, large and small, and has helped solve high-stake design verification challenges. Starting as a consultant at Duolog, he worked with market leading clients on protocol and SoC functional verification. Subsequently at Imagination and ARM, he led the functional verification teams for cutting-edge GPU and IoT subsystems respectively. At AIStorm and 5-Systems, he has further honed his ability to optimize verification by balancing time-to-market with uncompromising quality.
Peter is deeply committed to mentoring and guiding young engineers in digital verification, fostering their growth, and helping them develop a structured, analytical approach to problem-solving. He holds an MS in Electrical Engineering from the Budapest University of Technology and Economics.
Valentin Picos
Business Partner and Lead Embedded SW Development
Working extensively with IT companies in the EU, we've observed recurring obstacles in the realm of software and hardware development. Challenges arise in the form of:
📌 The perpetual search for qualified developers and engineers who can get the job done efficiently and on time;
📌 High costs and efforts for in-house development;
📌 Time-intensive development.
Chakra Parvathaneni
Advisor: Serial Entrepreneur, Technologist, and Innovator
Chakra Parvathaneni is Co-Founder and CEO of Gyrus AI with over 20+ years of experience in a variety of technical and executive roles in the Technology Industry. Previously Chakra was President of Imagination, a UK-listed IP Company and was responsible for their Sales and Business Development.
Shankar Hemmady
Advisor: Entrepreneur, Strategist, Analyst, and Industry veteran
Shankar Hemmady is the CEO of Blue Horizons, a San Francisco Bay Area-based consultancy that supports Fortune 500 companies on their AI strategies for optimal solutions in their vertical markets. Over the past 25 years, Shankar has been conceiving, investing in, marketing and delivering new products in 4 verticals: Electronic Design Automation, Semiconductor Design, Biotechnology and Education.
Meet Our Expert Team
Company Values
With our teams in the Silicon Valley, India, and Europe, we have been innovating with our customers since